The present invention relates to an image sensor, and more particularly to a CMOS active pixel sensor capable of compensating loss of sensor sensitivity due to leakage current in a light sensing device.
Charge-coupled devices (CCDs) have been the mainstay of conventional imaging circuits for converting images in the form of light energy into electrical signals. Advantages of CCD use include high sensitivity and full-factor. However, CCDs suffer from a number of weaknesses including limited readout rates and dynamic ranges, and difficulty in integrating CCDs with CMOS-based microprocessors.
FIG. 1 is a circuit diagram illustrating a conventional CMOS active pixel sensor. As shown in FIG. 1, the active pixel sensor (APS) 10 (or active pixel sensor cell) includes a photodiode 12 acting as light sensing means. This photodiode 12 has a cathode and an anode. The anode of the photodiode 12 is grounded, and the cathode thereof is collectively coupled to a source of N-channel reset transistor 14 and a gate of N-channel sense transistor 16. A drain of the N-channel reset transistor 14 is coupled to a power supply voltage Vdd, a source thereof is coupled to the cathode of the photodiode 12, and a gate thereof is coupled to a reset line 20.
The N-channel sense transistor 16 has a drain coupled to the power supply voltage Vdd, a gate coupled to the cathode of the photodiode 12 and the source of the reset transistor 14, and a source thereof coupled to a drain of N-channel row select transistor 18. A gate of the row select transistor 18 is coupled to a select line 22, and a source thereof is coupled to a bit line 24.
An operation of the active pixel sensor cell 10 is performed in three steps: a reset step, wherein the cell 10 is reset from a previous integration cycle; an image integration step, where the light energy is collected and converted into an electrical signal; and a signal readout step, wherein the electrical signal is read out.
During the reset step, the gate of the reset transistor 14 is briefly pulsed with a reset voltage (for example, about 5 volts), which resets the photodiode 12 to an initial integration voltage of (VRxe2x88x92VT), wherein the voltage VR is the reset voltage and the voltage VT is a threshold voltage of the reset transistor 14.
During the image integration step, light energy, in the form of photons, strikes the photodiode 12, thereby creating a number of electron-hole pairs. Thereafter, the photogenerated holes are attracted to the ground terminal of the photodiode 12, while the photogenerated electrons are attracted to the positive terminal of the photodiode 12. For the additional electrons, the voltage across the photodiode 12 is reduced. The photodiode 12 is designed to limit recombination between the newly formed electron-hole pairs.
At the end of the image integration period, the voltage across the photodiode 12 is equal to (VRxe2x88x92VTxe2x88x92VS), wherein the voltage VS is a voltage changed by the photons absorbed in the photodiode 12. Thus, voltage VS corresponds to the absorbed photons, VS can be determined by subtracting the voltage at the end of the image integration period from the voltage at the beginning of the image integration period. That is, the voltage VS is {(VRxe2x88x92VT)xe2x88x92(VRxe2x88x92VTxe2x88x92VS)}.
Following the image integration period, the active pixel sensor cell 10 is read out by turning on the row select transistor 18 (which has been kept off until this point). When the voltage across the photodiode 12 decreases, the gate voltage of the sense transistor 16 is also reduced, causing a reduction in the amount of current flowing to the bit line 24 through the transistors 16 and 18. Thereafter, a voltage VPX (or referred to as xe2x80x9ca pixel voltagexe2x80x9d) on the bit line 24 is detected by a conventional current detector.
FIG. 2 is a graphical illustration of the pixel voltage of the active pixel sensor 10 before and after a light incidence. During a non-exposure time for the light incidence, the pixel voltage VPX, that is, the voltage on the bit line 24 of FIG. 1, is lowered by a voltage VD corresponding to the dark current of the photodiode 12. During exposure from the incident light, the pixel voltage VPX is rapidly lowered. The non-exposure (reset) time t1 before the light incidence and the exposure time t2 during the light incidence can be different for different sensors dependant upon factors such as the size of the active pixel sensor cells.
After the photodiode 12 is reset by the reset integration voltage (VRxe2x88x92VT), as set forth above, the voltage of the photodiode 12 is lowered by a voltage VD corresponding to dark current (or leakage current) regardless of light energy before the incidence of light energy. As a result, the pixel voltage VPX=(VRxe2x88x92VTxe2x88x92VSxe2x88x92VD).
One problem of the above described CMOS active pixel sensor cell is that the dark current (or the leakage current) in the active pixel sensor cell 10 increases the noise level present at the gate of the select transistor. As a result, this decreases the sensitivity of the sensor. Since the amount of dark current occurring in active pixel sensor cells is different for different cells, it is difficult to compensate the dark current by a fixed offset.
It is therefore an object of the present invention to solve the above mentioned problems and to provide a CMOS active pixel sensor capable of compensating for performance loss due to leakage current in sensor.
According to an aspect of the present invention, a CMOS active pixel sensor is provided which comprises light sensing means for generating an output voltage at an output when light is incident thereupon, said light sensing means having an amount of leakage current before said light incidence, reset means for resetting the output voltage of the light sensing means to an initial reset voltage in response to a reset signal, a sense transistor having a source, a drain coupled to a power source, and a gate coupled to the output of the light sensing means, a select transistor having a drain connected to the source of the sense transistor, for providing a voltage at a source of the sense transistor to a bit line, in response to a select signal, and compensation means for supplying a voltage to the select transistor substantially corresponding to the output voltage of the light sensing means lowered by the leakage current.
Preferably, the compensation means comprises shielded light sensing means shielded from incident light, a first transistor for resetting an output voltage of the shielded light sensing means to the initial reset voltage in response to the reset signal, and a second transistor having a source, a drain coupled to the power source and a gate coupled to the output of the shielded light sensing means, for increasing current flow to the drain of the select transistor in an amount proportional to the leakage current of the shielded light sensing means.
Also provided is a method of increasing voltage readout sensitivity of a CMOS active pixel sensor, said sensor including a first photodiode having leakage current flow, a first reset transistor for resetting photodiode voltage and a first sense transistor connected to said photodiode, the method comprising the steps of: commonly connecting a second sense transistor at drain and source of said first sense transistor, said second sense transistor is of a type complementary to said first sense transistor; commonly connecting a second reset transistor to said first reset transistor for activating both first and second reset transistors by a reset signal; shielding a second photodiode from light incident on said first photodiode and connecting said second photodiode to said second reset transistor; and second source transistor, and reading out voltage upon illumination of incident light on said first photodiode by activating a select transistor connected to said first and second sense transistors.
Preferably, the first and second sense transistors are of NMOS and PMOS type, respectively.
These and other aspects, features and advantages of the present invention will become more readily apparent from the following detailed description of preferred embodiments, which is to be read in connection with the accompanying drawings.